Digital Electronics 2: Programmable Logic Devices
Course Number: EET 252
Transcript Title: Digital Electronics 2: PLDs
Created: May 12, 2014
Updated: May 12, 2014
Total Credits: 5
Lecture Hours: 40
Lecture / Lab Hours: 0
Lab Hours: 30
Satisfies Cultural Literacy requirement: No
Satisfies General Education requirement: No
Grading options: A-F (default), audit
Covers behavioral modeling, sequential logic, latches, flip flops, finite state machines analysis and design, registers, memory, microprocessors, and digital signal processing using programmable logic devices and fixed function integrated circuits. Includes a 3 hour per week laboratory. Prerequisites: EET 251. Audit available.
Upon successful completion of this course, students will be able to:
- Use behavioral modeling with VHDL to build a logic circuit with a programmable logic device
- Determine the behavior of basic sequential devices (SR Latch, D Latch, D Flip Flop, JK Flip Flop) and interpret specifications sheets
- Analyze and design a finite state machine to implement a task
- Utilize combinations of sequential devices to build registers that store and manipulate data
- Understand the role of registers, buses, and memory in the construction of microprocessors
- Build and interpret circuits that convert analog signals into digital data (ADC) and convert digital data into an analog signal (DAC)
Outcome Assessment Strategies
Evaluation is done via labs, quizzes, take home assignments, in class exercises, and exams.
Course Activities and Design
Lecture, discussion, online lessons, and lab exercises are the instructional methods used.
Laboratory activities include building a code converter circuit using behavior modeling, building a circuit that debounces a switch using sequential devices, analyzing a synchronous counter, designing a finite state machine, implementing shift registers, exploring microprocessor and memory devices, and building ADC and DAC circuits, using fixed function integrated circuits and programmable logic devices using VHDL.
Course Content (Themes, Concepts, Issues and Skills)
- VHDL behavioral modeling – advanced hardware definition language practices
- Sequential devices – SR Latches, D Latches, D Flip Flops, JK Flip Flops, switch debouncing, counters, memory, clock division
- Counter analysis – analysis of synchronous counters
- Finite state machines– design and implementation using JK Flip Flops, D Flip Flops, and behavioral modeling
- Registers – shift, bidirectional shift, parallel/series configurations
- Memory and microprocessors – bus systems
- Digital signal processing – ADC and DAC circuits