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Digital Systems II

Course Number: EET 122
Transcript Title: Digital Systems II
Created: September 1, 2012
Updated: December 19, 2014
Total Credits: 4
Lecture Hours: 30
Lecture / Lab Hours: 0
Lab Hours: 30
Satisfies Cultural Literacy requirement: No
Satisfies General Education requirement: No
Grading options: A-F (default), audit

Prerequisites

EET 121

Course Description

Second course in digital electronics presents sequential circuit elements (latches and D/JK flip-flops) with applications including counters, registers, and shift registers. Sequential network analysis and synthesis are covered including the use of state tables and state diagrams. Introduces sampling and the Nyquist Sampling Theorem including introductory coverage of analog-to-digital converters (ADC) and digital-to-analog converters (DAC). Includes a 3-hour per week laboratory. Prerequisite: EET 121 Audit available.

Intended Outcomes

  1. To be able to predict the operation of sequential digital circuits that use latches, D flip-flops, and JK flip-flops in circuit configurations including up/down counters, registers, and shift registers.
  2. To be able to design a counter having a specified count sequence using state diagrams and present state/next state truth tables.
  3. To be able to apply the mathematical relationships in the Nyquist Sampling Theorem to determine the required sampling frequency, filter cutoff frequencies, and guardband for a sampling system.
  4. To be able to analyze the operation of a flash-type analog-to-digital converter (ADC) and its application.
  5. Construct digital circuits, use standard laboratory instrumentation to verify the operation of the circuits, and use PC-based electronic circuit simulation software.

Outcome Assessment Strategies

Assessment methods are to be determined by the instructor. Typically, in-class quizzes, exams and weekly homework assignments will be used. Laboratory assessment will be by reports and/or practical skills testing.

Course Content (Themes, Concepts, Issues and Skills)

  1. The operation of the set-reset (SR) latch, enabled SR latch, and D latch.
  2. The operation of rising edge, and falling edge, D and JK flip-flops including the asynchronous inputs clear and preset.
  3. The timing characteristics of flip-flops including propagation delay, setup time, and hold time and that violations of the setup and/or hold time requirements of a particular flip-flop can result in "metastability" on the output(s) of the flip-flop.
  4. The operation of asynchronous counter circuits using JK and D flip-flops including the occurrence of glitch states.
  5. The design of asynchronous counter circuits (i.e., ripple counters) for a specified modulus using a detected state for clearing the counter (e.g., the RO(1) and RO(2) inputs of the 7493 MSI counter IC) and how this results in a "race condition".
  6. The operation of synchronous counter circuits using JK and D flip-flops.
  7. The design of synchronous circuits for a specified count sequence using a present state/next state table.
  8. The operational characteristics of synchronous MSI counter ICs (e.g., 74160, 74163, and 74190) and the manner in which they can be cascaded.
  9. The operation, and uses, of the following types of shift registers: serial-in serial-out, serial-in parallel-out, parallel-in serial-out, and parallel-in parallel-out.
  10. The general principle of Fourier Series (i.e., any periodic waveform can be equivalently expressed as a potentially infinite series of sinusoidal waveforms that, instant-by-instant, add-up to the original waveform where the frequencies of the sinusoidal waveforms are integer multiples of the frequency of the original waveform) and why Fourier Series are useful in electronics.
  11. The sampling process (i.e., sampling of an analog signal, digitizing the samples, communicating the digitized samples, converting the digitized samples back into analog, and reconstructing the original analog signal) with an overview of the Nyquist Sampling Theorem.
  12. The operation of the flash type analog-to-digital converter (ADC) and the relationship between the resolution of the flash-type ADC and the number of comparators required in the ADC.
  13. The definition of quantization error and its relationship to the resolution of an ADC.
  14. The general operation of the binary-weighted-resistor type digital-to-analog converter (DAC).

The use of PC-based circuit simulation software to simulate a digital circuit that contains flip-flops.

Department Notes

In the laboratory, the student will construct several digital circuits including a circuit that makes a sequence of changing tones which are heard using a miniature speaker and a circuit that makes a single channel of an oscilloscope display four independent signals. The student will use standard laboratory instrumentation, including the oscilloscope, to verify the operation of each circuit. The student will also use PC-based electronic circuit simulation software to simulate the operation of at least one digital circuit.